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Jaesik Lee

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Jaesik Lee

Senior Engineer | SK hynix America

California, San Francisco, United States

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Jaesik Lee

Summary

Jaesik Lee is an accomplished leader in the field of package engineering, currently serving as the VP of Package Engineering at SK Hynix America. With a PhD in Mechanical Engineering from the University of Waterloo, he possesses a broad knowledge of advanced packaging technologies and has made significant contributions to the microelectronics industry. His expertise spans various aspects of packaging and integration, including 2.5D and 3D IC technologies, and he holds numerous patents in these areas. Jaesik's career includes pivotal roles at top tech companies like Qualcomm, NVIDIA, and Google, where he has led teams in developing cutting-edge packaging solutions. He is known for his collaborative approach and has successfully managed partnerships with foundries and suppliers. Beyond technical skills, Jaesik is passionate about innovation and sustainability in engineering practices, positioning him as a forward-thinking leader in his field.

General

Specialist

Technical Background

Leadership Experience

Long-Term Tenure

Professional interests

Emerging Technologies

Leadership Development

Sustainability

Innovation

Organisational experience

Corporate Experience

Consulting Experience

Jaesik Lee

Work Experience

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VP Package Engineering, SK Hynix America at

SK hynix America

May 2023 - Present

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Jaesik Lee

Education

University of Waterloo, PhD, MechanIcal Engineering

Frequently Asked Questions about Jaesik Lee

What is Jaesik Lee email address?

Jaesik Lee's primary email address is **********@skhynix.com. To view the full verified email and additional contact details, sign up for free with Muraena.

What company does Jaesik Lee work for?

Jaesik Lee is a Senior Engineer at SK hynix America.

Where Jaesik Lee graduated from?

Jaesik Lee holds a degree in null from University of Waterloo.

How can I directly contact Jaesik Lee?

To contact Jaesik Lee directly, you can use the email address **********@skhynix.com. Complete contact information is available upon registration with Muraena.

Who is Jaesik Lee?

Jaesik Lee is an accomplished leader in the field of package engineering, currently serving as the VP of Package Engineering at SK Hynix America. With a PhD in Mechanical Engineering from the University of Waterloo, he possesses a broad knowledge of advanced packaging technologies and has made significant contributions to the microelectronics industry. His expertise spans various aspects of packaging and integration, including 2.5D and 3D IC technologies, and he holds numerous patents in these areas. Jaesik's career includes pivotal roles at top tech companies like Qualcomm, NVIDIA, and Google, where he has led teams in developing cutting-edge packaging solutions. He is known for his collaborative approach and has successfully managed partnerships with foundries and suppliers. Beyond technical skills, Jaesik is passionate about innovation and sustainability in engineering practices, positioning him as a forward-thinking leader in his field.

Jaesik`s contact details

mail

**********@skhynix.com

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